About Me
Currently working as ASIC Verification Engineer at PerfectVIPs Techno Solutions Pvt. Ltd. Having a good understanding of digital Design and Verification, knowledge of front-end verification of ASIC and Sub Systems IPs. Hands on experience on Verilog, System Verilog, UVM, Python and Perl.
Personal Information
- Name : Anil Sharma
- Age : 23 Years
- Phone : +91-7602579355
- Email : b150023ec@nitsikkim.ac.in
- Address : Near Suraj Palace,Infocity Patia,Bhubaneswar,India
Skills
Experience
Presently working as ASIC Verification Engineer at PerfectVIPs Techno Solutions Pvt. Ltd. Bhubaneshwar, India.
-->July 2019 - Present
Worked on verification of AMBA Protocols like APB and AHB.I have a basic idea of working of PICe. Currently working on VIP Development of UFS 2.1 (Universal Flash Memory). Strong in fundamentals of ASIC Verifaction flow, Verilog, System Verilog, Verifaction Methodology like UVM etc.
May 2018 - July 2018
Mentored by Prof. Virendra Singh, Dept. of Electrical Engineering, IIT Bombay. Implemented an efficient Single Pipelined 128 bit AES (Advanced Encryption Standard) Encryption algorithm for obtaining high throughput and frequency of about 1 GHz for high speed operation and also save the area of FPGA for better implementation. I have used Verilog HDL, Vivado Software and Basys3 FPGA development board for the implementation.
June 2017 - July 2017
30 days of training on VLSI Design and Embedded System (working with AT89C51 Micro-controller Board, Verilog HDL, ISE design suite, mikroC Pro and Proteus). Made a Digital Clock using 8051 Micro controller development kit and 64 bit single port RAM using Verilog.
Education
2015 - 2019
Bachelor of Technology from National Institute of Technology Sikkim, India, Major in Electronics and Communication Engineering with an agrregate of 7.54 CGPA
2014 - 2015
Passed Class 12 with an Aggregate of 78.4%
2012 - 2013
Passed Class 10 with an Aggregate of 8.0/10